AON7506 30v n-channel alphamos general description product summary v ds i d (at v gs =10v) 12a r ds(on) (at v gs =10v) < 9.8m w r ds(on) (at v gs =4.5v) < 15.8 m w application 100% uis tested 100% r g tested symbol v ds v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 30v ? latest trench power alphamos ( mos lv) technology ? very low r ds(on) at 4.5v v gs ? low gate charge ? high current capability ? rohs and halogen-free compliant ? dc/dc converters in computing, servers, and pol ? isolated dc/dc converters in telecom and industri al drain-source voltage 30 g ds top view 12 3 4 87 6 5 dfn 3x3 ep top view bottom view pin 1 v ds v gs i dm i as e as v ds spike v spike t j , t stg symbol t 10s steady-state steady-state r q jc 9.4 100ns 36 v a 20 avalanche energy l=0.05mh c maximum junction-to-case c/w c/w maximum junction-to-ambient a d 5 75 6 60 w 20.5 t c =25c 8 t c =100c p dsm w t a =70c 2 t a =25c 3.1 typ max v t c =25c t c =100c 48 pulsed drain current c continuous drain current g power dissipation b p d power dissipation a mj avalanche current c 10.5 continuous drain current g 10 12 a t a =25c i dsm a t a =70c i d 12 40 v 20 gate-source voltage drain-source voltage 30 maximum junction-to-ambient a c/w r q ja 30 units junction and storage temperature range -55 to 150 c thermal characteristics parameter rev0 : july 2012 www.aosmd.com page 1 of 6
AON7506 symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.3 1.8 2.3 v 8 9.8 t j =125c 11 13.5 13 15.8 m w g fs 45 s v sd 0.73 1 v i s 12 a c iss 542 pf c oss 233 pf c rss 31 pf r g 1 2 3 w q g (10v) 9 12.2 nc q g (4.5v) 4.3 5.8 nc q gs 2.2 nc q gd 1.7 nc t d(on) 4 ns t r 3.5 ns t 18 ns reverse transfer capacitance v gs =0v, v ds =15v, f=1mhz maximum body-diode continuous current g input capacitance output capacitance forward transconductance v ds =5v, i d =12a dynamic parameters r ds(on) static drain-source on-resistance diode forward voltage v gs =4.5v, i d =10a switching parameters turn-on delaytime gate drain charge total gate charge v gs =10v, v ds =15v, i d =12a turn-on rise time turn-off delaytime v gs =10v, v ds =15v, r l =1.25 w , r =3 w electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i s =1a,v gs =0v i dss m a zero gate voltage drain current drain-source breakdown voltage m w i d =250 m a, v gs =0v v gs =10v, i d =12a gate-body leakage current v ds =v gs, i d =250 m a v ds =0v, v gs =20v gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge gate source charge t d(off) 18 ns t f 3 ns t rr 9.7 ns q rr 11.5 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge body diode reverse recovery time i f =12a, di/dt=500a/ m s i f =12a, di/dt=500a/ m s turn-off delaytime r gen =3 w turn-off fall time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja t 10s value and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board de sign. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. single pulse width limited by junction temperat ure t j(max) =150 c. d. the r q ja is the sum of the thermal impedance from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev0 : july 2012 www.aosmd.com page 2 of 6
AON7506 typical electrical and thermal characteristics 17 52 10 0 18 0 10 20 30 40 50 0 1 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 4 6 8 10 12 14 16 0 3 6 9 12 15 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =10a v gs =10v i d =12a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 10 20 30 40 50 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 4v 6v 10v 4.5v 3.5v 40 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c (note e) 0 5 10 15 20 25 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =12a 25 c 125 c rev0: july 2012 www.aosmd.com page 3 of 6
AON7506 typical electrical and thermal characteristics 0 2 4 6 8 10 0 2 4 6 8 10 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 50 100 150 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to-ca se c oss c rss v ds =15v i d =12a t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe 10 m s 1ms dc r ds(on) limited t j(max) =150 c t c =25 c 100 m s 100ms (note f) 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse operating area (note f) r q jc =6 c/w rev0: july 2012 www.aosmd.com page 4 of 6
AON7506 typical electrical and thermal characteristics 0 5 10 15 20 25 30 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 12: power de-rating (note f) 0 5 10 15 20 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 13: current de-rating (note f) 1 10 100 1000 10000 1e-05 0.001 0.1 10 1000 power (w) pulse width (s) t a =25 c 40 0.001 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 15: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse pulse width (s) figure 14: single pulse power rating junction-to-am bient (note h) r q ja =75 c/w rev0: july 2012 www.aosmd.com page 5 of 6
AON7506 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar vdd vgs vgs rg dut - + vdc vgs id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr rev0: july 2011 www.aosmd.com page 6 of 6
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